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Title: An adaptive just-in-time compilation support with hardware/software system co-design for an embedded JAVA processor
Other Titles: Yi zhong zhen dui qian ru shi JAVA chu li qi dai ruan ying jian xie tong she ji de shi ying xing ji shi bian yi zhi yuan xi tong
一種針對嵌入式 JAVA 處理器帶軟硬件協同設計的適應性及時編譯支援系統
Authors: Yau, Chi Hang (邱致衡)
Department: Dept. of Electronic Engineering
Degree: Master of Philosophy
Issue Date: 2006
Publisher: City University of Hong Kong
Subjects: Compilers (Computer programs)
Embedded computer systems -- Design and construction
Java (Computer program language)
Notes: 170 leaves : ill. ; 30 cm.
CityU Call Number: TK7895.E42 Y38 2006
Includes bibliographical references (leaves 146-150)
Thesis (M.Phil.)--City University of Hong Kong, 2006
Type: Thesis
Abstract: In the past, programming language are procedural, the design concept is based on the module and scope which are difficult to manage, but nowadays, the programming trend is Object-Oriented Programming (OOP), where objects are the key elements to build up application and the communications between different objects are through method invocation. Method invocation involves procedures of locating the method code, access control checking, passing control from one object to another, etc. As the trend is moving to Object-Oriented (00) language, Java becomes an attractive alternative to mobile and embedded hardware platforms due to its security, compact object code, re-usability and portability on heterogeneous platforms, and is becoming the defacto standard. However, Java is not currently successful in mobile and embedded system due to the severe restrictions of its real-time behaviour such as the increasing of the memory requirement, an extra access control checking and resolving objects in run-time Java Virtual Machine. As a result, we need to find a solution to overcome these overheads. A novel Java processor with secure hardware object data structure for running OOP offers an opportunity to enhance the system security, performance and to provide an alternative and a more effective way to manipulate OOP instead of only using a software Virtual Machine. Besides, the loose backward compatibility of software in embedded system comparing with general-purpose computers is quite suitable for this novel processor design. jHlSC architecture is the novel object-oriented processor which provides a natural way to map the concept of OOP into architectural level through the hardware object data structure. In this research a hardware and software co-design techniques have been proposed. This is a software adaptive Just-In-Time (.llT) compilation support combined with a hardware Java processor design. A secure hardware object data structures on a novel Java processor jHlSC with adaptive JIT compilation for Java which makes it possible to implement complex 00 related bytecodes at hardware level, access some fields of object in parallel and through adaptive profiling to optimize code. Our objective is to improve the overall system security and execution speed in running Java. It mainly targets J2ME for embedded and mobile market and implements about 93% bytecodes and 83% 00 related bytecodes in hardware directly. Through this hardware and software co-design and codevelopment, Java can run as a native language in embedded devices similar to the performance of running C language on RlSC or ClSC and penetrate all Java's features into hardware to increase overall system security and performance.
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