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Title: Double-sided parallel-strip line circuit analysis and applications to microwave component designs
Other Titles: Ping xing dai xian dian lu fen xi ji qi zai wei bo yuan qi jian she ji zhong de ying yong
Authors: Chen, Jianxin (陳建新)
Department: Department of Electronic Engineering
Degree: Doctor of Philosophy
Issue Date: 2008
Publisher: City University of Hong Kong
Subjects: Microwave integrated circuits.
Strip transmission lines.
Notes: CityU Call Number: TK7876 .C49 2008
xi, 146 leaves : ill. 30 cm.
Thesis (Ph.D.)--City University of Hong Kong, 2008.
Includes bibliographical references (leaves 131-143)
Type: thesis
Abstract: Today, for microwave circuitry, the traditional microstrip line and coplanar waveguide (CPW) still play dominant roles as circuit media. Recently, the balanced transmission line such as coplanar stripline (CPS) and slot line have been commonly used to construct differential/balanced circuits for improving the circuit performance. This dissertation provides double-sided parallel-strip line (DSPSL) investigation for the DSPSL circuit analysis and applications to microwave component designs such as filter, power divider and differential active circuits. The DSPSL, as another balanced transmission line, has an important advantage over the CPS and slot line, i.e. easy realization of low characteristic impedance. This significant feature of the DSPSL is very useful for the integration of different microwave circuits or testing purpose without the need of any impedance transformer. Firstly, the properties of the DSPSL are studied by using the image method, and the calculation method of the characteristic impedance of the DSPSL is presented in detail for the following DSPSL circuit designs. A novel DSPSL-to-CPW transition is developed and comprehensive parametric studies are conducted. The relative bandwidth of the transition reaches about 150%, and the measured insertion loss of the transition is only 0.26dB at the center frequency. The DSPSL provides us with one more design freedom on characteristic impedance in addition to the strip width, i.e. the offset distance between the top and bottom strips. High characteristic impedance can be easily increased to a great extent by offsetting the top and bottom strips without changing the strip width, which not only enhances the circuit performance, but also improves the power-handling capability. Two types of design examples - lowpass filter and power dividers, are successfully designed to verify the proposed offset DSPSL technique. In the lowpass filter design, the high impedance 202.5Ω, which cannot be realized by the microstrip line or CPW, improves the filter performance and reduces the circuit size greatly. Owing to the symmetrical structure of the DSPSL, the placement of a conductor plane in the middle of the substrate cannot change the electromagnetic (EM) of the DSPSL, and thus has no effect on the DSPSL. Meanwhile, it can directly convert the DSPSL into a combination of two identical back-to-back differential microstrip pairs without any discontinuity induced, implying that no transition or impedance transformer between the DSPSL and back-to-back microstrip pairs is required. The inserted conductor plane can also be used as an isolator for individual design of the microstrip circuits on the top and bottom layers while the common ground plane of the top and bottom microstrip circuits is just provided by the inserted conductor plane. In brief, the inserted conductor plane has two functions: (1) isolating the top and bottom circuits, (2) providing the common ground plane for the top and bottom microstrip citcuits. This novel structure of the DSPSL with an inserted conductor plane has been successfully applied to the design of various high-performance and compact passive components such as filter components, out-of-phase power dividers and so on. In the filter components, the non-identical resonators on the top and bottom layers, isolated by the inserted conductor plane, generate their respective passband for the construction of the dual-band bandpass filter and diplexer. Furthermore, a novel out-of-phase power divider with arbitrary division ratio is proposed, and the design formula is derived and presented in detail. The relative bandwidth of the demonstrative equal out-of-phase power divider reaches about 100%. This is because the out-of-phase feature between the top and bottom strips of the DSPSL is frequency-independent, as a result, only impedance bandwidth is needed to be considered in this design. Based on the proposed multi-layer structure using the DSPSL with an inserted conductor plane, a novel differential oscillator using two sub-oscillators on the opposite sides of a dielectric substrate is proposed. The two sub-oscillators, sharing a common quarter-wavelength DSPSL resonator and a common ground plane, generate out-of-phase fundamental signals and in-phase second harmonics. At the common DSPSL output, the second harmonics are inherently cancelled out while the fundamental signals are well combined. By this design, an additional power combiner at the output, as required by the conventional differential/balanced circuits, is no longer needed. This greatly reduces the circuit size and simplifies the design procedure. Furthermore, a varactor is added at the end of the common resonator for tuning the oscillating frequency of the differential oscillator, constructing a novel differential voltage controlled oscillator (VCO). Centered at 2.69GHz, the tunable frequency range of the differential VCO is about 7.5%, and the linear range is approximately 5.2%. The output power fluctuation is less than 1.4dB in the tunable frequency range. Finally, the differential VCO can be used as a RF power source to integrate with the quasi-Yagi antenna designed using the DSPSL on the same substrate. The output signals of the two sub-oscillators are directly fed to the antenna without needing any bridging matching network. Noticeably, the out-of-phase feature between the two sub-oscillators is frequency-independent in the differential VCO, which ensures the low cross-polarization level of the antenna in the entire operation band.
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