Self-adaptive biasing technique : linearity and efficiency improvements for microwave power amplifiers

Abstract

The ever increasing demand for higher channel capacity has spurred wireless technology gone through generations of evolution. Sophisticated amplitude and phase modulations are commonly employed to improve the bandwidth efficiency. The advantages offered by such modulation schemes, however, couple with more stringent requirements of power amplification. The increases in both spectral bandwidth and peak-to-average power ratio of the wireless communication signals create a remarkably challenge to amplifier linearization. Intermodulation distortion (IMD) minimum contributes inherently to significant reduction of adjacent channel power leakage, which regarded as the “sweet spot” of intermodulation response. This physical phenomenon, however, exists typically within a few decibels dynamic range. Therefore, this dissertation is accordingly intended to provide the comprehensive investigations of a novel device-level bias-adaptation technique which can be devoted to IMD sweet spot control. Simultaneously, the devised biasing technique ably reduces the power consumption of the amplifier during low-power operation and self-adaptively increases its power capability during high-power operation. As a consequence, the signal linearity is improved under the same microwave output power, while the power efficiency is boosted under the same DC bias power. The study performed here introduces the self-adaptive biasing technique in due course, accounting for the progression of the entire research work. The dissertation begins with reviewing the origin and main requirements of microwave power amplifiers and highlighting the linearization and efficiency boosting techniques that have been employed. A newly developed circuit-level linearization technique exploiting IMD sweet spot is then introduced. As a matter of fact, the formation of an IMD minimum is exclusively determined by the nonlinear characteristic intrinsic to transistors. Meticulous analysis along using physical modeling and Volterra series is therefore conducted to provide the physical insight of the correlations to both impedance terminations and DC biasing condition. Novel biasing circuitries are subsequently designed and implemented. First, a single diode bias network is developed to utilize the nonlinear current rectification that inherently suffered in bipolar transistors for self-adaptive current biasing. It compensates the influence of the rectified current on the base-emitter junction voltage and concurrently, exploits this current to control the collector current. Since the devised circuitry works mainly on the portion of low frequency distortion components, the linearization and efficiency boosting effect can be achieved a wide frequency response. Two-tone measurements of the proposed distributed amplifier reveal 5 to 26.5dB suppressions of the third-order intermodulation distortion (IMD3) when operating between 700 and 3000MHz. Meanwhile, the self-adaptive biased current effectively reduces the drawn DC power of more than 20% at the total output power of 11dBm (each tone is equal to 8dBm). Second, the bias network is advanced for the universal applications in both bipolar and field-effect transistor amplifiers. Being the same in theory, the devised circuitry aims at providing a self-adaptive bias control – base current for bipolar transistors or gate voltage for field-effect transistors for self-adaptive current biasing. Based on the previously developed framework, a microwave diode is directly connected to the radio signal path in order to perform current rectification. This additional diode is simultaneously served as a linearizer that distorts the input signal with positive gain and negative phase transfer characteristics to compensate the amplitude and phase distortions. For the amplifier comprising a bipolar transistor, experimental results reveal 28dB suppressions of IMD3 and 18dB improvements of adjacent channel power ratio (ACPR) accordingly using two-tone and WCDMA modulation excitations at 1.95GHz operation. Meanwhile, the output 1dB gain compression point (P1dB) is boosted from 15 to 19dBm, while the DC bias power (PDC) is reduced by 20% at the total output power of 15dBm (each tone is equal to 12dBm). For the amplifier comprising a field-effect transistor, experimental results reveal 17dB suppressions of IMD3 and 10dB improvements of ACPR accordingly using two-tone and WCDMA modulation excitations at 1.95GHz operation. Meanwhile, the output P1dB is boosted from 22 to 25dBm, while the PDC is reduced by 25% at the total output power of 22dBm (each tone is equal to 19dBm). Third, a dual-dynamic biased amplifier is investigated for the sake of enhancing the effectiveness of IMD sweet spot. With the aid of a commercial DC/DC converter, dynamic voltage biasing can be simply incorporated with the devised self-adaptive current biasing. By the dint of the two foregoing techniques, not only the dynamic range of IMD sweet spot can be widened, but more importantly, its contribution to the suppression of adjacent channel power leakage can be enhanced. The ACPR of power amplification can be promisingly kept within the specification by the dedicated technique and thereby the output power can be fully utilized. Experimental two-tone test reveals that the proposed amplifier can be driven to the saturation with still keeping a constant ACPR of -30dBc, while the drain efficiency is still higher than 30%. Finally, two amplifier integrated circuits with on-chip self-adaptive bias network are implemented using the industrial 0.6μm silicon BiCMOS and 0.15μm gallium arsenide (GaAs) pHEMT processes. As anticipated, the single-stage BiCMOS amplifier reveals 25dB suppressions of IMD3, 4.5dB improvement of the output P1dB and 25% reduction of PDC under the two-tone signal excitation centered at 915MHz. The involvement of the diode linearizer contributes additionally 1dB improvement to the output P1dB, but deteriorates slightly the IMD performance. On the other side, the pHEMT amplifier validates the proposed dynamic IMD sweet spot in two-stage amplification. However, the power performance is deviated by the on-chip matching circuits. Only 21.5dBm of output power and 10% of power added efficiency are maximally achieved in the experimental two-tone test at 5.8GHz operation. Nevertheless, the devised self-adaptive current biased amplifiers integrated circuits are successfully realized in the chip sizes of 1.5mm2 and 1.12mm2, respectively.