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DC Field | Value | Language |
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dc.contributor.author | Zhou, Guanglei | en_US |
dc.date.accessioned | 2020-11-24T06:20:09Z | - |
dc.date.available | 2020-11-24T06:20:09Z | - |
dc.date.issued | 2020 | en_US |
dc.identifier.other | 2020eezg453 | en_US |
dc.identifier.uri | http://dspace.cityu.edu.hk/handle/2031/9357 | - |
dc.description.abstract | Polynomials multiplication is one of the most time-consuming operations for most of the lattice-based post-quantum cryptography schemes. For the cryptography scheme using the Ring-LWE, the key of implementation of Number-Theoretic-Transform (NTT) for the NTRU scheme is the fast constant-time polynomials’ multiplication. While the constant-time NTT implementation of the 2^𝑛 cyclotomic Ring has been proposed by some research groups [1-4], the constant-time NTT implementation over the 2^𝑛 × 𝐶^𝑚 cyclotomic ring has not yet been explored. In this FYP project, we present a Non-complete NTT multiplier for NTTRU which can be also called as reconfigurable secure processor for the PQC algorithms. Due to the nature of the NTT, different Ring and input polynomials size will be decomposed to a specific NTT structure and all the multiplication will be an in-place constant-time operation. In the initial stage, this work is mainly conducted using MATLAB, where we start by investigating into NTT process, studying the Chinese Remainder Theorem, and the Extended Euclidean algorithm to find the required NTT coefficients in this process. Eventually, we implement our proposed NTT structure on the MATLAB. Then, we focus on hardware implementation. We utilize the structure mentioned above and map it into Verilog code. We also adopt the Montgomery Modular Reduction to further accelerate the speed. We also produce the base inverse multiplication to increase the security level. In conclusion, we show that by using a modified version of Montgomery reduction, we match the performance on speed and area time product (ATP) compared with other existing work, including the AVX2 processor. The NTT implementation non-power-of-two cyclotomic field is presented. The future work of this project may focus on implementing the memory pipelining and the bank selection of the BRAM to further improve the memory read/write speed. | en_US |
dc.rights | This work is protected by copyright. Reproduction or distribution of the work in any format is prohibited without written permission of the copyright owner. | en_US |
dc.rights | Access is restricted to CityU users. | en_US |
dc.title | Non-complete Number Theoretic Transform Multiplication and Architecture | en_US |
dc.contributor.department | Department of Electrical Engineering | en_US |
dc.description.supervisor | Supervisor: Dr. Cheung, Ray C C; Assessor: Dr. Cheung, L M | en_US |
Appears in Collections: | Electrical Engineering - Undergraduate Final Year Projects |
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